Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure ASIC organization. We are looking for individuals with experience in EDA flow and methodology, CAD/automation and ASIC infrastructure to build efficient System on Chip (SoC) and IP for data center applications.ASIC Engineer, EDA Infrastructure Responsibilities: Front End implementation flow development and support.Physical Design implementation flow development and support.RTL2GDS flow development and support.Internal tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL generation tools, memory selection automation, register generation, filelist generation.Work with EDA vendors on new tools/technology and new features evaluation and adoption.Manage the internal EDA license requests, installation and license forecast as well as EDA tool installation and maintenance.Work with internal infrastructure team on compute grid, storage management and job scheduling architecture, efficiency and maintenance.Work with internal infrastructure team on adapting FB infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management and reporting.Minimum Qualifications:Knowledge of front-end and back-end ASIC tools and flows.Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.Experience with RTL design using SystemVerilog or other HDL.5+ years of experience with EDA tools and scripting languages (Python, Tcl) used to build tools and flows for complex environments.Experience with ASIC EDA infrastructure (compute, storage, job scheduling) management, maintenance and support.Experience with developing and supporting solutions for ASIC design environment and infrastructure.Experience with communicating across functional internal teams and with vendors.Preferred Qualifications:Experience setting up EDA infrastructure from scratch.User experience and customer oriented solutions.Salary: . Date posted: 03/28/2024 10:08 PM

Principal Design Verification (Formal Verification) Engineer

Microsoft Games, Bangalore, Any

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a principal formal verification engineer to work in the dynamic Microsoft Artificial Intelligence S ilicon Engineering team (AIS iE ) . The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.ResponsibilitiesThe AI SiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge , custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. Build and manage formal verification team. Own and lead formal verification of complex modules at the IP/Subsystem/ SOC level using latest techniques to increase the RTL design quality . Collaborate with the architecture and design teams to define formal verification scope . Identify right strategy to prove RTL correctness by deploying advance formal techniques and create abstraction models for convergence . Create formal verification test plan across multiple IPs , track and verify respective test plan . Innovate new technologies , evaluate new tools, and corroborate results. Debug RTL to identify causes of failure scenarios. Work with vendors on resolving hard design and tool problems. Articulate formal verification coverage of the design to partners. Coach and mentor others in formal verification areas of expertise. Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion Qualifications 1 5 or more years of experience in design verification with 10+ years of proven track record in using formal verification techniques on complex SoC IP's (CPU, Neural Networks IPs, DMA, Security IP, Interconnects, power management etc. ) Formal method or formal verification technologies experience and abstraction techniques. Knowledge and experience in interpreting hardware logic , familiarity with SV/ Verilog/VHDL HDLs and using assertion-based languages like SVA or PSL . Experience in using Industry standard EDA formal tools for property verification and logic equivalency checks . Strong understanding of digital design principles, Datapath architecture, and arithmetic units Strong proficiency in s cripting language such as Python or Perl with excellent debugging skills Passionate about developing world-class/innovative formal verification solutions . Desirable: Experience using VC_Formal , SLEC tools Experience of working on AI/ML SoCs or CPU cores Tool development experience #SCHIEINDIA Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form . Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Salary: . Date posted: 04/02/2024 03:16 AM

RTL Design Engineer

Siemens, Bangalore, Any

Hello Visionary!We know that the only way a business thrive is if our people are growing. That's why we always put our people first. Our global, diverse team would be happy to support you and challenge you to grow in new ways. Who knows where our shared journey will take you?Siemens founded the new business unit Siemens Advanta (formerly known as Siemens IoT Services) on April 1, 2019 with its headquarter in Munich, Germany. It has been crafted to unlock the digital future of its clients by offering end-to-end support on their outstanding digitalization journey. Siemens Advanta is a strategic advisor and a trusted implementation partner in digital transformation and industrial IoT with a global network of more than 8000 employees in 10 countries and 21 offices. Highly skilled and experienced specialists offer services which range from consulting to craft & prototyping to solution & implementation and operation - everything out of one hand.We are looking for Software Developer !You'll make a difference by:Being ad full FPGA development flow from logic design, place route, timing analysis closure.Developing RTL code to implement FPGA-based digital designs.Understanding the customer requirements and product definition and define architecture and detailed design spec.Micro-architecture and coding of assigned module in VHDL/VerilogProviding estimates on FPGA resources, computation bandwidth, and memory bandwidth.Implementation of the design for porting on FPGA after required optimization based on available resources and timing closure requirement.Integrating digital IP blocks from internal or external sources into the overall design, ensuring compatibility and functionality.Writing test bench for verifying design for complete scenario coverage.Conducting functional simulation and RTL-level verification using simulation tools (e.g., ModelSim) to verify the correctness of the RTL code and IP Blocks.Your success is grounded in:Holding a Bachelors B.Tech/Electrical and Electronics with proven record and good knowledge of implementing digital logic designs in FPGA systems to join our team in Bangalore. The successful candidate will have 3 to 5 years of relevant experience and will play a crucial role in the design and integration of RTL components for FPGA based complex projects. Strong RTL design experience in VHDL/VerilogProficient with digital logic design.Experience in IP design or SOC integrationExperience with advanced Xilinx/Intel FPGA families and the Xilinx/Intel development tools including Vivado/QuartusUnderstanding of ARM SoCs with AXI/AHB buses, peripherals, CPUs is desirable.Modeling the algorithms in Octave/MATLAB, generating test vectors, visualizing data.Working knowledge on interfacing with ADCs and DACs and interpreting their performance.Troubleshooting and debugging FPGA implementations on boards.Working knowledge of C/C++ is added advantage.Knowledge of Linux, Device Drivers and any scripting language such as TCL/Perl/python.Prior experience using industry standard tools for Lint, CDC etc. is desired.Experience with protocols like SPI, I2C, DDR, Ethernet, HDMI, PCIe etc.Highly motivated, self-starter with good interpersonal skills and a strong team playerExcellent communication, critical thinking, and problem-solving skillsYou would be working with a team of software and hardware developers collaborating globally with complete ownership of bringing up hardware, writing drivers and test firmware, and delivering prototypes.Join us and be yourself!We value your outstanding identity and perspective and are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society. Come bring your authentic self and build a better tomorrow with us. Protecting the environment, conserving our natural resources, encouraging the health and performance of our people as well as safeguarding their working conditions are core to our social and business dedication at Siemens.Make your mark in our exciting world at Siemens.This role is based in Bangalore and is an Individual contributor role. You might be required to visit other locations within India and outside. In return, you'll get the chance to work with teams impacting - and the shape of things to come.We're Siemens. A collection of over 379,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and imagination and help us shape tomorrow.Find out more about Siemens careers at: www.siemens.com/careersSalary: . Date posted: 04/02/2024 02:55 PM

Senior Verification Engineer

Microsoft Games, Bangalore, Any

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The Silicon IP Architecture and Verification team is seeking passionate, driven, and intellectually curious silicon verification engineer who can work with cross-discipline teams (systems, firmware, architecture, design, validation, product engineering, ...) to develop environment and test cases to verify SOC designs. The ideal candidate is also passionate about developing systematic and efficient methods to detect hardware/software vulnerabilities. Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from innovative high-performance consumer products like Xbox to Azure cloud servers, clients, and IoT SOCs.ResponsibilitiesThe role will be responsible for creation of verification environments and tests, pre-silicon verification at the block, sub-system, and SoC levels - functional, stress, performance and application-level use cases, and SoC level CoverageQualifications B.S. or higher in Computer Engineering, Electrical Engineering, or similar. 8+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems. Proficient in System Verilog, C/C++, and scripting languages such as Python, Ruby or Perl. Requirements: Experience in pre-silicon verification of blocks/sub systems and SoCs through full cycle In depth knowledge of verification principles, testbenches, stimulus generation, coverage. Substantial background in creating SV/UVM Test Benches, developing tests, debugging designs and closing coverage. Solid understanding of chip and/or computer architecture Experience writing tests in C/C++, System Verilog and UVM Scripting language such as Python, Ruby, or Perl Excellent communication skills Energetic and self-motivated Prior experience in the following would also be valuable: Experience with PCIe/MIPI subsystems Experience with the use of formal verification methods Experience in RTL design for FPGA or emulation Experience in Assembly, start-up code and linker scripts. Experience in developing makefiles for software development. #SCHIEINDIA Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form . Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Salary: . Date posted: 04/05/2024 03:16 AM

Associate ASIC - FPGA Verification Engineer

Boeing, Bangalore, Any

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.OverviewBoeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrow The Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven culture At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace.Position Overview:Boeing India Engineering seeks an Associate ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design.Develop models in System Verilog to verify design implementation and develop and run scripts and Make files.Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.Leads reviews of testing and analysis activity to assure compliance to requirements.Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements.Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.Proficient in creating verification plan IPs/Subsystems.Coordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirements.Works under minimal direction Basic Qualifications (Required Skills/Experience): Bachelors or master is required.6 to 9 of experience in Digital ASIC/FPGA verification.Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Experience in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.Experience working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Experience in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In depth understanding in System Verilog language and verification concepts.Work experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git. Preferred Qualifications (Desired Skills/Experience): Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Experience in Avionics protocols is a plus Typical Education & Experience: Bachelor / Master / Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 6 to 9 years of experience & Master's degree with 5+ years of experience. Relocation: This position does offer relocation based on candidate eligibility within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/08/2024 03:48 PM

Lead ASIC-FPGA Verification Engineer

Boeing, Bangalore, Any

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrowThe Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven cultureAt Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace. Position Overview Boeing India Engineering seeks a Lead ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and designDevelop models in System Verilog to verify design implementation and develop and run scripts and MakefilesLeads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic productsLeads reviews of testing and analysis activity to assure compliance to requirementsIdentifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirementsLeads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologiesProficient in crafting verification plan IPs/SubsystemsCoordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirementsWorks under minimal directionShould Have exposure to SOI3 Audits and also have DO-254 Certification or training Basic Qualifications (Required Skills/Experience): Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry is required14 to 16 years of experience in Digital ASIC/FPGA verification.4 or more years of concurrent exposure to Digital ASIC/FPGA Design. Preferred Qualifications (Desired Skills/Experience): Experience leading development of architectural approaches from customer and system requirements.Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.Experience directing a team of engineers for technical excellence.Experience developing and leading sophisticated and high data rate design verification bench.Expert in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Expert in using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, and scoreboards.Work experience crafting a self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Work experience performing clock cross domain analysis (CDC).Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In-hand depth upon System VerilogWork experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git.Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Good Understanding in deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications.Basic understanding upon concepts like RTL synthesis, Static Timing Analysis and correcting timing violations.Experience in Avionics protocols is a plus. Typical Education & Experience: Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 14 to 16 years of experience & Master's degree with 12+ years of experience. Relocation: This position offers relocation based on candidate eligibility Within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/09/2024 03:52 PM

ASIC Engineer, Emulation

Facebook, Bangalore, Any

Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We are looking for individuals with experience in HW emulation and prototyping required to build System on Chip (SoC) and IP for data center applications.ASIC Engineer, Emulation Responsibilities: Deliver emulation and prototyping models from RTL on industry standard emulation and prototyping platforms.Build and execute emulation test plans to ensure quality of the models and assist pre-silicon validation.Drive emulation methodologies for HW verification and SW development.Develop emulation tools, workflows and infrastructure in collaboration with RTL, verification, validation and SW teams for productivity during debug, runtime, and data analysis of results from emulation runs.Bring up and debug PCIe, DDR and generic SOC interfaces.Develop emulation validation components for validation efficiency in testing, debug and automation.Partner with vendors to debug issues, deploy new emulation capabilities, and drive improvements.Minimum Qualifications:Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.6+ years of experience with current emulation technologies and methods, simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods.Experience with current emulation technologies and methods, simulation acceleration, in-circuit emulation, speed bridges, virtual prototyping, and hybrid methods.Track record of 'first-pass success' in ASIC where emulation is one of the key validation tools.Experience with SystemVerilog and C++ to model RTL components and transactors.Preferred Qualifications:Understanding of compilation and build flow with experience building images from scratch with necessary design modifications to adapt to emulation.Experience in architecting emulation systems for various design scales (IP blocks, SOC, multi-chip system) with an understanding of trade-offs between performance and ease of debug.Experience managing multiple design releases and working with cross functional teams to support and debug customer issues.Experience with post-silicon bring up, debug, and reproducing issues on emulators.Experience with Palladium, Protium, or Zebu tools.Experience with Python and TCL scripting languages.Experience interfacing with the design, verification, validation and software development teams and understand their needs from an emulation perspective.Salary: . Date posted: 04/18/2024 10:11 PM

Associate ASIC - FPGA Verification Engineer

Boeing, Bangalore, Any

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrow The Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven culture At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace.Position Overview:Boeing India Engineering seeks an Associate ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design.Develop models in System Verilog to verify design implementation and develop and run scripts and Make files.Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.Leads reviews of testing and analysis activity to assure compliance to requirements.Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements.Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.Proficient in creating verification plan IPs/Subsystems.Coordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirements.Works under minimal direction Basic Qualifications (Required Skills/Experience): Bachelors or master is required.6 to 9 of experience in Digital ASIC/FPGA verification.Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Experience in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.Experience working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Experience in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In depth understanding in System Verilog language and verification concepts.Work experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git. Preferred Qualifications (Desired Skills/Experience): Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Experience in Avionics protocols is a plus Typical Education & Experience: Bachelor / Master / Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 6 to 9 years of experience & Master's degree with 5+ years of experience. Relocation: This position does offer relocation within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/19/2024 03:59 PM

Silicon Front-End Implementation Engineer II

Microsoft Games, Bangalore, Any

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Silicon Front End Implementation Enginee r II to work on leading edge IP development as part of the SCIPS Semi-custom and Central IP Silicon team. The candidate should be a motivated self-starter who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each da y we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. We're committed to a diverse and inclusive workplace and strongly encourage applicants from all background and walks of life . Difference makes us better.ResponsibilitiesYou will be a key link between front-end design and back-end teams. As a n enable r of quality RTL and collateral file drops to PD, you will be responsible for implementing feedback and mitigations in the design constraints and toolchain to ensure best-case PPA. Strong communication skills will be needed to coordinate with RTL, DFT, CAD and physical design teams. You will participate in flow development, design automation, and correlation exercises to back-end flows. You are expected to work with limited direction and have attention to detail. You will also be expected to be able to provide crisp status of progress, issues, and risks on the program to the management team.Qualifications Required Bachelor of Science in Electrical or Computer Engineering 5 + years of experience in hardware design 3 + years of experience in Synthesis, Timing constraints, Front-end design checks and Power Performance Area (PPA) trade-offs Proficiency in collateral development including timing and synthesis constraints Proficiency in front-end design checks including LEC, Lint, Formal Equivalence, and CDC/RDC Proficiency in recent synthesis tool capabilities and methods for QoR improvement Proficiency in static timing analysis Familiarity with RTL and gate-level power analysis/optimization, UPF, and power-intent verification Experience with the project-level setup and configuration of 1 or more of the tools related to above disciplines Proficiency in translating physical design results into feedback for flow or RTL improvement Proficiency in Tcl , Perl, Python, shell programming Preferred Knowledge of full RTL2GDS flow Experience in ICC, power integrity analysis, ESD, PV Good communication and self- motivated that can collaborate with larger teams within Microsoft . Occasional travel Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form . Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Salary: . Date posted: 04/23/2024 03:19 AM