Verification Engineer Salary in India - PayScale

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a principal formal verification engineer to work in the dynamic Microsoft Artificial Intelligence S ilicon Engineering team (AIS iE ) . The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.ResponsibilitiesThe AI SiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge , custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. Build and manage formal verification team. Own and lead formal verification of complex modules at the IP/Subsystem/ SOC level using latest techniques to increase the RTL design quality . Collaborate with the architecture and design teams to define formal verification scope . Identify right strategy to prove RTL correctness by deploying advance formal techniques and create abstraction models for convergence . Create formal verification test plan across multiple IPs , track and verify respective test plan . Innovate new technologies , evaluate new tools, and corroborate results. Debug RTL to identify causes of failure scenarios. Work with vendors on resolving hard design and tool problems. Articulate formal verification coverage of the design to partners. Coach and mentor others in formal verification areas of expertise. Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion Qualifications 1 5 or more years of experience in design verification with 10+ years of proven track record in using formal verification techniques on complex SoC IP's (CPU, Neural Networks IPs, DMA, Security IP, Interconnects, power management etc. ) Formal method or formal verification technologies experience and abstraction techniques. Knowledge and experience in interpreting hardware logic , familiarity with SV/ Verilog/VHDL HDLs and using assertion-based languages like SVA or PSL . Experience in using Industry standard EDA formal tools for property verification and logic equivalency checks . Strong understanding of digital design principles, Datapath architecture, and arithmetic units Strong proficiency in s cripting language such as Python or Perl with excellent debugging skills Passionate about developing world-class/innovative formal verification solutions . Desirable: Experience using VC_Formal , SLEC tools Experience of working on AI/ML SoCs or CPU cores Tool development experience #SCHIEINDIA Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form . Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Salary: . Date posted: 04/02/2024 03:16 AM

DESCRIPTIONAs a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in an FPGA or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc.You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will:· Design world class hardware and software· Communicate and work with team members across multiple disciplines· Deliver detailed test plans for verification of complex digital design blocks by working with design engineers and architects· Create and enhance constrained-random verification environments using SystemVerilog and UVM· Identify and write all types of coverage measures for stimulus and corner-cases.· Debug tests with design engineers to deliver functionally correct design blocks.· Close coverage measures to identify verification holes and to show progress towards tape-out.· Participate in test plan and coverage reviewsThe ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues.We are open to hiring candidates to work out of one of the following locations:Bangalore, KA, INDBASIC QUALIFICATIONSBachelor’s degree or higher in EE, CE, or CS 2+ years or more of practical semiconductor design verification including System Verilog, UVM, assertions and coverage driven verification. Experience developing UVM test bench, writing testplan, developing tests and verifying the design Experience with writing directed/constrained-random tests Experience identifying bugs in architecture, functionality and performance with strong overall debug skills.Experience verifying at multiple levels of logic from SoCs to full system testing Experience with industry standard tools and scripting languages (Python or Perl) for automationExcellent verbal and written communication skillsPREFERRED QUALIFICATIONSBS in Computer Science, Electrical Engineering, or related field. Experience with CPU block level testing Experience debugging system-level issuesStrong programming skills in C/C++ and scripting skills in Python and/or Perl Experience with high performance industry standard IO interfaces like AMBA AXI4, USB, MIPI etc.

pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor's 30:year legacy of technology advancements and strong IP portfolio but with a new mission-to enhance Murata's world:class capabilities with high:performance semiconductors. With a strong foundation in RF integration, pSemi's product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi's team explores new ways to make electronics for the connected world smaller, thinner, faster and better.Job SummaryThis position is for a Senior Engineer, Digital Verification. The primary responsibilities include, but will not be limited to, technically guide test plan development, define the verification methodology and infrastructure, tracking deliverables to ensure timely execution with high quality.The Senior Engineer responsibilities will also include mentoring junior Verification Engineers.The individual will work closely with the digital design, and Product Development teams in India Design Center and global design centers. This position is located in pSemi India Design Center (IDC) in Chennai, India.Roles and ResponsibilitiesThis position has responsibility for::Development and deployment of verification and validation environment of digital circuits from scratch and (or) adapt and improve upon existing environment:Design, build, and maintain verification test suites to fully verify ICs:Deliver detailed test plans for verification of complex digital design blocks:Definition of verification simulation tool flow:Identify and write all types of coverage measures for stimulus and corner:cases:Debug tests with design engineers to deliver functionally correct design blocks:Close coverage measures to identify verification holes :Work with interdisciplinary teams to identify automation and tool requirements :Mentor junior verification engineers:Support independent product development and provide support for other design groups:Maintain a positive growth culture in IDCCompetency RequirementsIn order to perform the job successfully, an individual should demonstrate the following competencies: :Displaying Technical Expertise: Keeps his/her technical skills current; effectively applies specialized knowledge and skills to perform work tasks; understands and masters the technical skills, knowledge, and tasks associated with his/her job; shares technical expertise with others :Driving for Results: Aggressively pursues challenging goals and objectives; will to put in considerable time and effort to accomplish objectives; takes a highly focused, goal driven approach toward work :Making Accurate Judgments and Decisions: Bases decisions on a systematic review of relevant facts and information; avoids making assumptions or rushing to judgment; provides clear rationale for decisions:Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information:Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situationsMinimum Qualifications (Experience and Skills):Typically requires 3 to 6 years of digital design verification experience, depending on education level:Proficiency in logic design verification:Ability to debug and perform root cause failure analysis at RTL and gate level:Demonstrated

ASIC Design and Verification course by Maven Silicon imparts advanced verification technologies & methodologies and trains the engineers extensively on SystemVerilog and UVM. Reach us at +91 9108490555 OR [email protected] httpswww.maven-sil

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. The Silicon IP Architecture and Verification team is seeking passionate, driven, and intellectually curious silicon verification engineer who can work with cross-discipline teams (systems, firmware, architecture, design, validation, product engineering, ...) to develop environment and test cases to verify SOC designs. The ideal candidate is also passionate about developing systematic and efficient methods to detect hardware/software vulnerabilities. Our team is involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems ranging from innovative high-performance consumer products like Xbox to Azure cloud servers, clients, and IoT SOCs.ResponsibilitiesThe role will be responsible for creation of verification environments and tests, pre-silicon verification at the block, sub-system, and SoC levels - functional, stress, performance and application-level use cases, and SoC level CoverageQualifications B.S. or higher in Computer Engineering, Electrical Engineering, or similar. 8+ years of experience in developing test plans, creating simulation environments, developing tests, and debugging for multiple IPs, SoCs or systems. Proficient in System Verilog, C/C++, and scripting languages such as Python, Ruby or Perl. Requirements: Experience in pre-silicon verification of blocks/sub systems and SoCs through full cycle In depth knowledge of verification principles, testbenches, stimulus generation, coverage. Substantial background in creating SV/UVM Test Benches, developing tests, debugging designs and closing coverage. Solid understanding of chip and/or computer architecture Experience writing tests in C/C++, System Verilog and UVM Scripting language such as Python, Ruby, or Perl Excellent communication skills Energetic and self-motivated Prior experience in the following would also be valuable: Experience with PCIe/MIPI subsystems Experience with the use of formal verification methods Experience in RTL design for FPGA or emulation Experience in Assembly, start-up code and linker scripts. Experience in developing makefiles for software development. #SCHIEINDIA Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form . Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.Salary: . Date posted: 04/05/2024 03:16 AM

DESCRIPTIONAs a Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in an FPGA or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will: · Design world class hardware and software · Communicate and work with team members across multiple disciplines · Deliver detailed test plans for verification of complex digital design blocks by working with design engineers and architects · Create and enhance constrained-random verification environments using SystemVerilog and UVM · Identify and write all types of coverage measures for stimulus and corner-cases. · Debug tests with design engineers to deliver functionally correct design blocks. · Close coverage measures to identify verification holes and to show progress towards tape-out. · Participate in test plan and coverage reviews The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues. We are open to hiring candidates to work out of one of the following locations:Bangalore, KA, INDBASIC QUALIFICATIONSBachelor’s degree or higher in EE, CE, or CS7+ years or more of practical semiconductor design verification including System Verilog, UVM, assertions and coverage driven verification.Experience using multiple verification platforms: UVM test bench, emulator, software environments and system testingExperience defining verification methodologiesExperience with test plan development, test bench infrastructure, developing tests and verifying the designExperience with writing directed/constrained-random testsExperience identifying bugs in architecture, functionality and performance with strong overall debug skillsExperience verifying at multiple levels of logic from SoCs to full system testingExperience with industry standard tools and scripting languages (Python or Perl) for automationExcellent verbal and written communication skillsPREFERRED QUALIFICATIONSMS in Computer Science, Electrical Engineering, or related field.Experience with CPU block level testingExperience debugging system-level issuesStrong programming skills in C/C++ and scripting skills in Python and/or PerlExperience with high performance industry standard IO interfaces like AMBA AXI4, USB, MIPI etc.Experience with formal verificationExperience with embedded softwareExperience with transaction level modelingKnowledge of FPGA and emulation platformsKnowledge of SoC architecture

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.OverviewBoeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrow The Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven culture At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace.Position Overview:Boeing India Engineering seeks an Associate ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design.Develop models in System Verilog to verify design implementation and develop and run scripts and Make files.Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.Leads reviews of testing and analysis activity to assure compliance to requirements.Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements.Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.Proficient in creating verification plan IPs/Subsystems.Coordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirements.Works under minimal direction Basic Qualifications (Required Skills/Experience): Bachelors or master is required.6 to 9 of experience in Digital ASIC/FPGA verification.Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Experience in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.Experience working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Experience in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In depth understanding in System Verilog language and verification concepts.Work experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git. Preferred Qualifications (Desired Skills/Experience): Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Experience in Avionics protocols is a plus Typical Education & Experience: Bachelor / Master / Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 6 to 9 years of experience & Master's degree with 5+ years of experience. Relocation: This position does offer relocation based on candidate eligibility within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/08/2024 03:48 PM

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrowThe Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven cultureAt Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace. Position Overview Boeing India Engineering seeks a Lead ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and designDevelop models in System Verilog to verify design implementation and develop and run scripts and MakefilesLeads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic productsLeads reviews of testing and analysis activity to assure compliance to requirementsIdentifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirementsLeads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologiesProficient in crafting verification plan IPs/SubsystemsCoordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirementsWorks under minimal directionShould Have exposure to SOI3 Audits and also have DO-254 Certification or training Basic Qualifications (Required Skills/Experience): Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry is required14 to 16 years of experience in Digital ASIC/FPGA verification.4 or more years of concurrent exposure to Digital ASIC/FPGA Design. Preferred Qualifications (Desired Skills/Experience): Experience leading development of architectural approaches from customer and system requirements.Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.Experience directing a team of engineers for technical excellence.Experience developing and leading sophisticated and high data rate design verification bench.Expert in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Expert in using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, and scoreboards.Work experience crafting a self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Work experience performing clock cross domain analysis (CDC).Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In-hand depth upon System VerilogWork experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git.Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Good Understanding in deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications.Basic understanding upon concepts like RTL synthesis, Static Timing Analysis and correcting timing violations.Experience in Avionics protocols is a plus. Typical Education & Experience: Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 14 to 16 years of experience & Master's degree with 12+ years of experience. Relocation: This position offers relocation based on candidate eligibility Within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/09/2024 03:52 PM

Are you an experienced Verification and Validation (V&V) Engineer and want to be a part of Siemens Mobility growing team? Siemens Mobility is an outstanding place to have a career in an innovative environment. Siemens Mobility Rail Infrastructure business supplies the global markets of rail and road-bound transport with innovative products and solutions for Rail Automation, Rail Electrification and in the area of intermodal mobility, apps and backend systems. If you're interested to work as V&V Engineer from one of our offices in Brisbane, Melbourne or Sydney offices, we'll offer you the support to make it happen! We provide flexibility on your work location. Change the future with us. In this position, you will use your experience in the analysis and development of system and product requirements, system and product V&V, automatic testing, test case design and execution as applied to complex rail systems. You will: Review projects from V&V, system and product artefacts perspective as needed Analyse and evaluate all the system V&V related customer requirements Develop V&V documentation including Plans, Verification requirements (VRs), Test Case development, VCRMs, execution and reports Execute projects of the relevant work packages based on detailed cost and time planning Support engineering teams as well as integration, test, validation and approval work. Use your skills to move the world forward. You bring your 5+ years' experience in V&V using standards such as IEC61508, EN50126, EN50128 and EN50129. Your prior experience in V&V on complex systems projects for other industries such as Defence, Aerospace, Manufacturing, Industrial Control or Power systems for example will also be very well regarded. You hold a relevant tertiary qualification in Engineering, Science or Mathematics. What We Offer Flexible working arrangements Career, professional & personal development National & International opportunities Positive, inclusive and relaxed working environment Industry leading parental leave package Novated Leasing available Discounts on Goods & Services Siemens Share Options Can you see yourself, learning, growing, and succeeding here? If so, we'd like to meet you! We support a diverse workforce. Siemens is a proud equal opportunity employer, creating a work environment of diversity and inclusion. Our diverse workforce cultivates Innovation and Excellence and in turn creates a workplace where our employees belong and prosper. Diversity and inclusion help us fully realise the potential of our people. As part of Siemens Ownership culture, Siemens also genuinely supports reasonable flexible working practices that empower our employees to best meet work and personal commitments. #LI-SISalary: . Date posted: 04/11/2024 08:40 PM

Job DescriptionAt Boeing, we innovate and collaborate to make the world a better place. From the seabed to outer space, you can contribute to work that matters with a company where diversity, equity and inclusion are shared values. We're committed to fostering an environment for every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.Boeing is the world's largest (Per Boeing LinkedIn page) aerospace company and a leading provider of commercial airplanes, defense, space, and security systems, and global services. Building on a legacy of over a century of innovation and leadership, Boeing continues to lead the way in technology and innovation, customer delivery, and investment in its people and future growth of aerospace.In India, Boeing has been a strong partner to the Indian aerospace and defense sectors for more than 75 years. People at Boeing have been supporting mission readiness and modernization of India's defense forces, and enabling connected, safer, and smarter flying experiences, in the sky, in the seas, and in space.Technology for today and tomorrow The Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.People-driven culture At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts - enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.At Boeing, we are inclusive, diverse, and transformative. With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace.Position Overview:Boeing India Engineering seeks an Associate ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development. Primary Responsibilities: Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design.Develop models in System Verilog to verify design implementation and develop and run scripts and Make files.Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.Leads reviews of testing and analysis activity to assure compliance to requirements.Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements.Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.Proficient in creating verification plan IPs/Subsystems.Coordinates engineering support throughout the lifecycle of the product.Plans research projects to develop concepts for future product designs to meet projected requirements.Works under minimal direction Basic Qualifications (Required Skills/Experience): Bachelors or master is required.6 to 9 of experience in Digital ASIC/FPGA verification.Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.In depth experience in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.Experience in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.Experience working with self-checking simulation test bench from scratch for SoCs/ASIC/FPGA.Experience in verification working with internal/external VIPs, its development and evaluation with multiple vendors.In depth understanding in System Verilog language and verification concepts.Work experience using Linux or Unix terminal commands.Experience using scripting languages: Make, Perl, Python, shell scripts, etc.Experience using Revision Control Systems: Subversion (SVN), CVS, Git. Preferred Qualifications (Desired Skills/Experience): Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).Experience in Avionics protocols is a plus Typical Education & Experience: Bachelor / Master / Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 6 to 9 years of experience & Master's degree with 5+ years of experience. Relocation: This position does offer relocation within INDIA.Export Control Requirements: Not an export control positionEqual Opportunity Employer:We are an equal opportunity employer. We do not accept unlawful discrimination in our recruitment or employment practices on any grounds including but not limited to; race, color, ethnicity, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military and veteran status, or other characteristics covered by applicable law.We have teams in more than 65 countries, and each person plays a role in helping us become one of the world's most innovative, diverse and inclusive companies. We are proud members of the Valuable 500 and welcome applications from candidates with disabilities. Applicants are encouraged to share with our recruitment team any accommodations required during the recruitment process. Accommodations may include but are not limited to: conducting interviews in accessible locations that accommodate mobility needs, encouraging candidates to bring and use any existing assistive technology such as screen readers and offering flexible interview formats such as virtual or phone interviews.Salary: . Date posted: 04/19/2024 03:59 PM