Soc Engineer jobs in Hyderabad, Andhra Pradesh: 25 vacancies

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.Determines architecture design, logic design, and system simulation.Defines module interfaces/formats...

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.Determines architecture design, logic design, and system simulation.Defines module interfaces/formats...

Drive TR to achieve best floorplan, package, PPA, TFM choice, signoff criteria & technology.Job Description

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building...

: Ability to develop value-creating strategies and models that enable clients to innovate, drive growth and increase their business profitability Good knowledge on software configuration management systems Awareness...

Job responsibilities :- Create SoC Verification plan and develop C/SV based SoC verification tests- Develop understanding on SoC and perform Processor based SoC verification and Emulation using C/SV- Develop simulation FW and E2E datapath ...

Role :- Lead PD/STA execution of partitions/subsystems/SoC with full ownership from synthesis to TI. - Must have experience on 10nm and below technology nodes.- Responsible for schedule amp; quality goals. - Responsible for stake holder ...

Coordinating dependency resolution and deliverable expectations with internal and external teams to facilitate executionImplementing/driving Initiatives for continuous improvement of verification quality...

... . In this role as a Senior Physical Verification Engineer in Micron's Non:Volatile Engineering Group, you ... semi:custom/digital layouts : Has owned PV of at least three SoC tapeout hands:on. : Very proficient in Mentor graphics/Cadence EDA ...

Experience : Minimum 4+ yearsRequirements :- Experience with complex ASIC projects, with demonstrated mastery of successful verification from test planning till tapeout- Strong background in System Verilog and UVM methodologies and ...